Speaker
Description
Approximately 80\% of global energy is currently lost as low-grade waste heat (300–600 K). While solid-state thermoelectric (TE) generators present a promising solution for waste heat recovery, conventional high-efficiency TE materials are typically toxic and incompatible with standard Complementary Metal-Oxide-Semiconductor (CMOS) manufacturing, severely hindering their large-scale industrial integration. To address this bottleneck, this study demonstrates the potential of non-toxic, fully CMOS-compatible Group IV materials for efficient near-room-temperature TE energy harvesting. The fundamental advantage of our designed $\text{Si}_x\text{Ge}_{1-x}$ multilayer structure lies in a novel fabrication process that enables a continuous Ge concentration gradient from 0\% to 100\%, yielding strain-relaxed layers as evidenced by X-ray diffraction (XRD) and polarization-resolved Raman spectroscopy. Crucially, the engineered interfaces between each $\text{Si}_x\text{Ge}_{1-x}$ layer provide strong phonon scattering, thereby significantly reducing the material's thermal conductivity. Using non-destructive Raman thermometry coupled with analytical models, we accurately determine this reduced thermal conductivity without requiring complex sample preparation. In parallel, Scanning Transmission Electron Microscopy (STEM) reveals ~10 nm dislocations at the interfaces. Our established physical heat-profile model elucidates how these structural imperfections induce phonon localization, effectively confining heat within individual layers to boost TE efficiency. Finally, we utilize Technology Computer-Aided Design (TCAD) to demonstrate the promising application potential of these novel TE materials in next-generation devices.
